Figure 2 : (a) SST poly-SiOx passivated c-Si
solar cell with (top) symmetric n-type doped poly-SiOxon DST substrate and (bottom) symmetric p-type doped
poly-SiOx DSP substrate; (b) DST
poly-SiOx passivated c-Si solar cell with symmetric
(top) n-type doped poly-SiOx and (bottom) p-type doped
poly-SiOx on DST substrates.
On the other hand, for the symmetric p-type doped
poly-SiOx on DST wafer, notwithstanding the optimum
found again at 10 minutes of thermal annealing in Figure 3(c), thermally
grown tunnelling SiOx prepared at 675 °C for 3 minutes
was found to yield better results (iVoc~ 640 mV) than the rest of the samples. The
underwhelming passivation performance of these DST samples can be
ascribed to a strong Auger recombination due to the excessive diffusion
of dopants in the c-Si bulk. To quench such a diffusion, a 2-step
annealing was used [71],[72]. The first annealing step, done
after the intrinsic a-Si layer deposition, was performed at 950 °C for 1
minute. This was meant to render this intrinsic silicon denser [73]
and therefore harder for dopants to be crossed. The second annealing
step, done after the deposition of the doped a-SiOx:H
layer, was performed at 950 °C between 5 and 15 minutes like in previous
cases so far discussed. For this new series of samples, thermally grown
tunnelling SiOx was prepared at
675 °C for 3 minutes. The passivation results for the symmetric p-type
doped poly-SiOx on DST wafers are reported in Figure
3(d), showing more than 20 mV improvement with respect to the best
passivation achieved with the single-step annealing.